STATIC ANALYSIS:
Static analysis techniques are system verification techniques that don’t involve executing a program. Rather, they work on a source representation of the software— either a model of the specification or design, or the source code of the program. Static analysis techniques can be used to check the specification and design models of a system to pick up errors before an executable version of the system is available. They also have the advantage that the presence of errors does not disrupt system checking. When you test a program, defects can mask or hide other defects so you have to remove a detected defect then repeat the testing process.
They examine the design or code in detail, looking for possible errors or omissions. The technique is using design modeling tools to check for anomalies in the UML, such as the same name being used for different objects.
However, for critical systems, additional static analysis techniques may be used:
1. Formal verification, where you produce mathematically rigorous arguments that a program conforms to its specification.
2. Model checking, where a theorem prover is used to check a formal description of the system for inconsistencies.
3. Automated program analysis, where the source code of a program is checked for patterns that are known to be potentially erroneous.
